Artificial intelligence is becoming more powerful every year, but it also needs faster and larger memory systems to keep up with growing demands.
Now, researchers in South Korea have developed a new technology that could significantly improve the performance of future AI chips by allowing many more memory chips to be packed into the same amount of space.
The research was led by scientists from Pohang University of Science and Technology (POSTECH) and the Korea Institute of Industrial Technology (KITECH).
Their findings were published in the journal Results in Engineering.
Modern AI systems, including chatbots like ChatGPT, image-generation software, and self-driving vehicles, must process huge amounts of information extremely quickly.
One of the key technologies that makes this possible is high-bandwidth memory (HBM), a special type of memory that stores and transfers data at very high speeds.
Instead of making memory chips larger, engineers improve performance by stacking multiple chips vertically. This is similar to building a high-rise apartment instead of spreading houses across a large area. By stacking chips, manufacturers can fit more computing power into a smaller space.
However, this approach becomes much more difficult as chips become thinner.
The research team created semiconductor chips that are only about 14 micrometers thick, roughly one-fifth the thickness of a human hair. At this size, the chips become extremely fragile. They can easily bend, warp, crack, or break during manufacturing, making it difficult to stack many layers accurately.
Traditional manufacturing methods often struggle with these delicate chips. Existing techniques require extremely precise handling and can damage the chips or cause them to become misaligned, especially when many layers are stacked together.
To solve this problem, the researchers developed a new manufacturing process that combines two important techniques into a single step. The first, called transfer printing, places each tiny chip exactly where it is needed. The second, known as in-situ bonding, creates the electrical connections between chips during the same process.
By combining these steps, the team was able to transfer, align, and electrically connect each chip more efficiently while reducing the risk of damage.
Using this new method, the researchers successfully stacked more than 10 ultrathin semiconductor chips under relatively low temperatures and low pressure. Even after repeatedly adding layers, the chips remained accurately aligned, and the finished stack stayed flat without significant warping.
Perhaps the most impressive result was the stacking density. Compared with today’s commercial 12-layer high-bandwidth memory technology, the new approach achieved an integration density about four times higher. This means many more memory chips could fit into the same vertical space, potentially allowing future AI processors to handle much larger amounts of data without increasing the size of the device.
The researchers believe the technology could do more than improve AI memory. It may also be useful for advanced semiconductor designs that combine different types of chips into one package, as well as future micro-LED displays and other high-performance electronic devices.
Although more development is needed before the technology reaches commercial products, the breakthrough shows a promising path toward faster, more compact, and more energy-efficient AI hardware.
As artificial intelligence continues to grow in complexity, innovations like this could help remove one of the biggest obstacles limiting future computing performance.
Source: KSR.
